1. Field
The present disclosure relates to a layout design system, and/or a system and/or a method for fabricating a mask pattern using the same.
2. Description of Related Art
Fabricating processes of semiconductor devices are becoming increasingly miniaturized and integrated. Thus, in a process of 20 nm or less, a double patterning technology (DPT) or a triple patterning technology (TPT) may be used as an extreme ultra violet (EUV) alternative technique according to the limit of a photolithography process. At this time, a process defective bridge, a critical dimension difference or the like may occur during photolithography and etching processes may occur due to differences in pattern pitch and pattern density of the DPT/TPT.